Features: JEDEC standard 1.35V (1.28V ~ 1.45V) and 1.5V (1.425V ~ 1.575V) Power SupplyVDDQ = 1.35V (1.28V ~ 1.45V) and 1.5V (1.425V ~ 1.575V)800 MHz fCK for 1600 Mb/sec/pin8 independent internal banksProgrammable CAS Latency: 11, 10, 9, 8, 7, 6Programmable Additive Latency: 0, CL-2, or CL-1 clock8-bit pre-fetchBurst Length: 8 (Interleave without any limit, sequential with starting address "000" only), 4 with tCCD = 4 which does not allow seamless read or write [either on the fly using A12 or MRS]Bi-directional Differential Data StrobeInternal(self) calibration: Internal self calibration through ZQ pin (RZQ: 240 ohm +/- 1%)On Die Termination using ODT pinAsynchronous ResetPCB: Height 1.18" (30mm), double sided component MEM_Recommend Use:
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